View source for Tm4clib-uart-functions

__NOTOC__
== UART Functions ==
=== uart_clear_interrupt_flag() ===
''void uart_clear_interrupt_flag(uint32_t uart, enum [[EmSys:Tm4clib-uart-defines#uart_interrupt_flag|uart_interrupt_flag]] ints)''<br />	
Mark interrupt as serviced.

After an interrupt is services, its flag must be cleared. If the flag is not cleared, then execution will jump back to the start of the ISR after the ISR returns.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
[in] ints → Interrupts which to clear. Any combination of interrupts may be specified by OR'ing them together.

=== uart_clock_from_piosc() ===
''void uart_clock_from_piosc(uint32_t uart)''<br />	
Clock the UART module from the internal oscillator.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_clock_from_sysclk() ===
''void uart_clock_from_sysclk(uint32_t uart)''<br />
Clock the UART module from the system clock.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />

=== uart_disable() ===
''void uart_disable(uint32_t uart)''<br />
Disable the UART.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />

=== uart_disable_fifo() ===
''void uart_disable_fifo(uint32_t uart)''	<br />
Disable FIFO for the UART.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_disable_interrupts() ===
''void uart_disable_interrupts(uint32_t uart, enum [[EmSys:Tm4clib-uart-defines#uart_interrupt_flag|uart_interrupt_flag]] ints)''<br />	
Enable Specific UART Interrupts.

Disabe any combination of interrupts. Interrupts may be OR'ed together to disable them with one call. For example, to disable both the RX and CTS interrupts, pass (UART_INT_RX | UART_INT_CTS)

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
[in] ints → Interrupts which to disable. Any combination of interrupts may be specified by OR'ing them together.

=== uart_disable_rx_dma() ===
''void uart_disable_rx_dma(uint32_t uart)''<br />
Disable the UART Receive DMA.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />

=== uart_disable_rx_interrupt() ===
''void uart_disable_rx_interrupt(uint32_t uart)''<br />
Disable the UART Receive Interrupt.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_disable_tx_dma() ===
''void uart_disable_tx_dma(uint32_t uart)''	<br />
Disable the UART Transmit DMA.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_disable_tx_interrupt() ===
''void uart_disable_tx_interrupt(uint32_t uart)''<br />
Disable the UART Transmit Interrupt.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_enable() ===
''void uart_enable(uint32_t uart)''	<br />
Enable the UART.

Enable the UART. The Rx and Tx lines are also enabled.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_enable_fifo() ===
''void uart_enable_fifo(uint32_t uart)''<br />
Enable FIFO for the UART.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_enable_interrupts() ===
''void uart_enable_interrupts(uint32_t uart, enum [[EmSys:Tm4clib-uart-defines#uart_interrupt_flag|uart_interrupt_flag]] ints)''<br />		
Enable Specific UART Interrupts.

Enable any combination of interrupts. Interrupts may be OR'ed together to enable them with one call. For example, to enable both the RX and CTS interrupts, pass (UART_INT_RX | UART_INT_CTS)<br />

Note that the NVIC must be enabled and properly configured for the interrupt to be routed to the CPU.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
[in] ints → Interrupts which to enable. Any combination of interrupts may be specified by OR'ing them together

=== uart_enable_rx_dma() ===
''void uart_enable_rx_dma(uint32_t uart)''<br />
Enable the UART Receive DMA.
'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_enable_rx_interrupt() ===
''void uart_enable_rx_interrupt(uint32_t uart)''<br />
Enable the UART Receive Interrupt.

Note that the NVIC must be enabled and properly configured for the interrupt to be routed to the CPU.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_enable_tx_dma() ===
''void uart_enable_tx_dma(uint32_t uart)''<br />
Enable the UART Transmit DMA.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_enable_tx_interrupt() ===
''void uart_enable_tx_interrupt(uint32_t uart)''<br />
Enable the UART Transmit Interrupt.

Note that the NVIC must be enabled and properly configured for the interrupt to be routed to the CPU.
'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_is_interrupt_source() ===
''static bool uart_is_interrupt_source(uint32_t uart, enum [[EmSys:Tm4clib-uart-defines#uart_interrupt_flag|uart_interrupt_flag]] source)''<br />		
Determine if interrupt is generated by the given source.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
[in] source → source to check.

=== uart_is_rx_fifo_empty() ===
''static bool uart_is_rx_fifo_empty(uint32_t uart)	''

Determine if the RX fifo is empty.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_is_rx_fifo_full() ===
''static bool uart_is_rx_fifo_full(uint32_t uart)	''

Determine if the RX fifo is full.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_is_tx_fifo_empty() ===
''static bool uart_is_tx_fifo_empty(uint32_t uart)''	

Determine if the TX fifo is empty.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_is_tx_fifo_full() ===
static bool uart_is_tx_fifo_full(uint32_t uart)	

Determine if the TX fifo is full.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_recv() ===
''uint16_t uart_recv(uint32_t uart)''<br />	
UART Read a Received Data Word.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
'''Returns'''<br />
data from the Rx FIFO.

=== uart_recv_blocking() ===
''uint16_t uart_recv_blocking(uint32_t uart)''	

UART Read a Received Data Word with Blocking.

Wait until a data word has been received then return the word.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
'''Returns'''<br />
data from the Rx FIFO.

=== uart_send() ===
''void uart_send(uint32_t uart, uint16_t data)''<br />	
UART Send a Data Word.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
[in] data → data to send.

=== uart_send_blocking() ===
''void uart_send_blocking(uint32_t uart, uint16_t data)''<br />	
UART Send Data Word with Blocking.

Blocks until the transmit data FIFO can accept the next data word for transmission.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_set_baudrate() ===
''void uart_set_baudrate(uint32_t uart, uint32_t 	baud)''<br />	
Set UART baudrate.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
[in] baud → Baud rate in bits per second (bps).*

=== uart_set_databits() ===
''void uart_set_databits(uint32_t uart, uint8_t databits)''<br />	
Set UART databits.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
[in] databits → number of data bits per transmission.

=== uart_set_fifo_trigger_levels() ===
''void uart_set_fifo_trigger_levels(uint32_t uart, enum [[EmSys:Tm4clib-uart-defines#uart_fifo_rx_trigger_level|uart_fifo_rx_trigger_level]] rx_level, enum [[EmSys:Tm4clib-uart-defines#uart_fifo_tx_trigger_level|uart_fifo_tx_trigger_level]] tx_level)''<br />	
Set the FIFO trigger levels.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
[in] rx_level → Trigger level for RX FIFO<br />
[in] tx_level → Trigger level for TX FIFO

=== uart_set_flow_control() ===
''void uart_set_flow_control(uint32_t uart, enum [[EmSys:Tm4clib-uart-defines#uart_flowctl|uart_flowctl]] flow)''<br />	
Set the flow control scheme.

Set the flow control scheme by enabling or disabling RTS and CTS lines. This will only have effect if the given UART supports the RTS and CTS lines.

'''Parameters'''<br />	
[in] uart → UART block register address base UART register base addresses<br />
[in] flow → The flow control scheme to use (none, RTS, CTS or both) <br />
UART_FLOWCTL_RTS – enable the RTS line <br />
UART_FLOWCTL_CTS – enable the CTS line <br />
UART_FLOWCTL_RTS_CTS – enable both RTS and CTS lines

=== uart_set_mode() ===
''void uart_set_mode(uint32_t uart, uint32_t mode)''	
	
=== uart_set_parity() ===
''void uart_set_parity(uint32_t uart, enum [[EmSys:Tm4clib-uart-defines#uart_parity|uart_parity]] parity)''<br />		
Set UART parity.

'''Parameters'''<br />	
[in] uart → UART block register address base UART register base addresses<br />	
[in] bits → the requested parity scheme.

=== uart_set_stopbits() ===
''void uart_set_stopbits(	uint32_t uart, uint8_t stopbits)''	
Set UART stopbits.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses<br />
[in] bits → the requested number of stopbits, either 1 or 2.

=== uart_wait_recv_ready() ===
''void uart_wait_recv_ready(uint32_t uart)''<br />
UART Wait for Received Data Available.

Blocks until the receive data FIFO holds a at least valid received data word.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses

=== uart_wait_send_ready() ===
''void uart_wait_send_ready(uint32_t uart)''<br />
UART Wait for Transmit Data Buffer Not Full.

Blocks until the transmit data FIFO is not empty and can accept the next data word. 
Even if the FIFO is not empty, this function will return as long as there is room for at least one more word.

'''Parameters'''<br />
[in] uart → UART block register address base UART register base addresses