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Difference between revisions of "TM4C123GXL GPIO - Configure each pad in the port to have pull-up-pull-down-open drain"

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== GPIO - Configure each pad in the port to have pull-up, pull-down, or open drain ==
 
== GPIO - Configure each pad in the port to have pull-up, pull-down, or open drain ==
Optionally, you can configure each pad in the port to have pull-up, pull-down, or open drain function through the GPIOPUR, GPIOPDR , or GPIOODR register. Slew rate may also be configured, if needed, through the '''GPIOSLR''' register.
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We can configure each pad in the port to have pull-up, pull-down, or open drain function through the GPIOPUR, GPIOPDR , or GPIOODR register. Slew rate may also be configured, if needed, through the '''GPIOSLR''' register.
  
 
=== GPIO Pull-Up Select (GPIOPUR), GPIO Pull-Down Select (GPIOPDR) ===
 
=== GPIO Pull-Up Select (GPIOPUR), GPIO Pull-Down Select (GPIOPDR) ===

Revision as of 05:26, 4 June 2019

GPIO - Configure each pad in the port to have pull-up, pull-down, or open drain

We can configure each pad in the port to have pull-up, pull-down, or open drain function through the GPIOPUR, GPIOPDR , or GPIOODR register. Slew rate may also be configured, if needed, through the GPIOSLR register.

GPIO Pull-Up Select (GPIOPUR), GPIO Pull-Down Select (GPIOPDR)

  • The GPIOPUR register is the pull-up control register.
    When a bit is set, a weak pull-up resistor on the corresponding GPIO signal is enabled.
    Setting a bit in GPIOPUR automatically clears the corresponding bit in the GPIO Pull-Down Select (GPIOPDR) register.
  • The GPIOPDR register is the pull-down control register.
    When a bit is set, a weak pull-down resistor on the corresponding GPIO signal is enabled.
    Setting a bit in GPIOPDR automatically clears the corresponding bit in the GPIO Pull-Up Select (GPIOPUR) register.

GPIO Pull-Up Select (GPIOPUR) Register

Tm4c gpiopur r.png
Bit/Field Name Description
7:0 PUE Pad Weak Pull-Up Enable
0: The corresponding pin's weak pull-up resistor is disabled.
1: The corresponding pin's weak pull-up resistor is enabled.
Setting a bit in the GPIOPDR register clears the corresponding bit in

the GPIOPUR register. The change is effective on the second clock cycle after the write if accessing GPIO via the APB memory aperture. If using AHB access, the change is effective on the next clock cycle.

31:8 Reserved Software should not rely on the value of a reserved bit.

GPIO Pull-Down Select (GPIOPDR) Register

Tm4c gpiopdr r.png
Bit/Field Name Description
7:0 PDE Pad Weak Pull-Down Enable
0: The corresponding pin's weak pull-down resistor is disabled.
1: The corresponding pin's weak pull-down resistor is enabled.
Setting a bit in the GPIOPUR register clears the corresponding bit in the GPIOPDR register. The change is effective on the second clock cycle after the write if accessing GPIO via the APB memory aperture. If using AHB access, the change is effective on the next clock cycle.
31:8 Reserved Software should not rely on the value of a reserved bit.